US PATENT SUBCLASS 257 / 333
.~.~.~.~.~ With thick insulator to reduce gate capacitance in non-channel areas (e.g., thick oxide over source or drain region)

Current as of: June, 1999
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257 /   HD   ACTIVE SOLID-STATE DEVICES (E.G., TRANSISTORS, SOLID-STATE DIODES)

213  DF  FIELD EFFECT DEVICE {6}
288  DF  .~ Having insulated electrode (e.g., MOSFET, MOS diode) {17}
327  DF  .~.~ Short channel insulated gate field effect transistor {6}
329  DF  .~.~.~ Gate controls vertical charge flow portion of channel (e.g., VMOS device) {1}
330  DF  .~.~.~.~ Gate electrode in groove {4}
333.~.~.~.~.~ With thick insulator to reduce gate capacitance in non-channel areas (e.g., thick oxide over source or drain region)

DEFINITION

Classification: 257/333

With thick insulator to reduce gate capacitance in non-channel areas (e.g., thick oxide over source or drain region):

(under subclass 330) Subject matter wherein the device with a gate electrode in a groove is provided with a thick insulator material layer to reduce gate capacitance in non-channel areas, e.g., a thick layer of oxide located over the source

or drain region.