US PATENT SUBCLASS 713 / 400
SYNCHRONIZATION OF CLOCK OR TIMING SIGNALS, DATA, OR PULSES


Current as of: June, 1999
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713 /   HD   ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: SUPPORT

400SYNCHRONIZATION OF CLOCK OR TIMING SIGNALS, DATA, OR PULSES {1}
401  DF  .~> Using delay


DEFINITION

Classification: 713/400

SYNCHRONIZATION OF CLOCK OR TIMING SIGNALS, DATA, OR PULSES

(under the class definition) Subject matter wherein clock or timing signals, timing pulses, or data associated with a control or regulation of processing component, memory component, or I/O component are caused to operate in synchronization.

SEE OR SEARCH THIS CLASS, SUBCLASS:

500, for clock, pulse or timing signal generation or analysis in a digital data processing system.

SEE OR SEARCH CLASS

326, Electronic Digital Logic Circuitry,

93+, for clocking or synchronizing of logic states or gates.

327, Miscellaneous Active Electrical Nonlinear Devices, Circuits, and Systems, appropriate subclasses, particularly 141+, for synchronizing in a signal converting, shaping or generating system.

348, Television, appropriate subclasses, particularly

500+, for techniques or maintain proper time or phase correspondence between scanning components of the television system.

358, Facsimile,

409+, for methods or apparatus to maintain a proper time or phase correspondence between a transmitter and a receiver of a facsimile system.

368, Horology: Time Measuring Systems or Devices,

47, and 52+ for synchronization in plural timepiece system or system device.

370, Multiplex Communications,

324, for multiple access time division synchronization in an airborne or space satellite repeater, subclass 350 for synchronization in a combining or distributing information via time channels of a communication over free space system and subclasses 503+ for synchronization in a combining or distributing information via time channels of a communication over wire system.

375, Pulse or Digital Communications,

354+, for synchronizing the operation of pulse or digital receiving or transmitting mechanisms.

705, Data Processing: Financial, Business Practice, Management, or Cost/Price Determination, 7+, for operations research per se including systems directed to generalized linear programming problem solving and cost function analysis, resource allocating in business transaction processing and scheduling of interrelated processes.

709, Electrical Computers and Data Processing Systems: Multiple Computer or Process Coordinating,

1+, for task management or control, particularly subclass 3+ for process scheduling, subclass 248 for multi-computer synchronization in a network.

710, Electrical Computers and Digital Processing Systems:

Input/Output,

61, for synchronous data transfer in I/O process timing.

712, Electrical Computers and Digital Processing Systems-Processing Architectures and Instruction Processing (e.g., Processors),

220+, for processing control, per se; and particularly subclasses 245+ for processing sequence control.

714, Electrical Computers and Digital Processing Systems: Error Detection/Correction Fault Detection /Recovery,

12, for synchronization maintenance of concurrent redundantly operating processors in a fault recovery by masking or reconfiguring; subclasess15+ for state recovery (i.e., process or data file) in computers or digital data processing systems, subclass 707 for a data error detection/correction system in which a determination of an error rate is used to control synchronization between devices, subclass 731 for a scan path digital logic testing system having a timing function or a clock pulse generator, subclass 744 for a digital logic testing system having a timing function or a clock pulse generator; subclass 775 for the detection and correction of a lack of synchronization between an encoder and a decoder used in a forward error correction by block code system, subclass 789 for the detection/correction of a lack of synchronization between an encoder and a decoder in a forward error correction by tree code system, subclass 798 for error detection techniques utilized to detect an out-of-synch condition or to control synchronization between devices.