US PATENT SUBCLASS 438 / 192
.~.~ Vertical channel

Current as of: June, 1999
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438 /   HD   SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS

142  DF  MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS {6}
186  DF  .~ Having junction gate (e.g., JFET, SIT, etc.) {9}
192.~.~ Vertical channel {1}
193  DF  .~.~.~> Multiple parallel current paths (e.g., grid gate, etc.)

DEFINITION

Classification: 438/192

Vertical channel:

(under subclass 186) Process for making a junction gate field effect transistor wherein the active channel is configured to provide, in whole or in part, a vertically conductive pathway between source and drain regions.

SEE OR SEARCH THIS CLASS, SUBCLASS:

347, for a process of making a permeable base bipolar transistor.